Thed Arthur

藍染め

The Indigo Engineer

Special Edition

No. 2026 — Vol. 4

Vélizy / France

Summer 26 May-Aug
Embedded Systems HPC & Optimization Architecture

Passion Architecture & System:
Inside the core

System
Parallel Processing Patterns Source: GitHub/Thedtk24

Understanding what happens "under the hood". This curiosity animates Thed Arthur T.D., a student in 4th year computer Science Engineering Cycle at ISTY (UVSQ). Passionate about system operation, he orientates his curriculum towards High-Performance Computing (HPC) and low-level optimization.

Exploration

Through academic and personal projects, he develops skills in distributed programming (OpenMP, MPI) and scalability analysis. He uses GDB & Valgrind to master memory behavior.

Experience

Internships at ACT-ON DATA (2025) and CNRS Institut Pprime (2026). Specialized in modernizing BI systems and optimizing legacy CFD codes for HPC architectures.

Current Focus

HPC Engineer Intern at CNRS Institut Pprime (CNRS)

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© 2026 Thed.Arthur
UVSQ - Université Paris-Saclay
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